After 30 years in this industry, I am starting to detect a pattern. Every so often, a new product comes to the market that forever changes the industry—and changes what is possible. This is a rare event; yet in my career, I have had the privilege to personally participate in four such episodes.
The first time I was a hardware product manager at HP when we rolled out the world's first RISC microprocessor-based server. It was seven times faster than a DEC VAX 11/780 at a quarter of the cost. It was my job to convince customers to implement something called RISC into their data centers—ironically the most risk-averse part of the IT infrastructure. More than once, I had to explain that "really, it is spelled with a C, not a K.”
At the time, RISC was a revolutionary new architecture based on the concept that less is more. By simplifying the instruction set, it was possible to shrink more of the computer system onto a single piece of silicon. The result was dramatic. Whereas the VAX implemented the system across 13 separate boards interconnected via a bus, we were able to implement the main parts of the server on a single board. Faster, cheaper and more reliable, the child of Joel Birnbaum's powerful vision was a remarkable achievement. It forever changed the way computers were built. It was the logical path forward.
At the time I predicted that within 10 years all microprocessors would be RISC designs. And you know, I was pretty close. With the delivery of Pentium, Intel moved to RISC in 1993. Today the lone holdout is the “Itanic” (Itanium) processor, which implements a Very Long Instruction Word (VLIW) architecture; based upon its market share, it missed the mark.
The second breakthrough I witnessed firsthand occurred when I was at the Business Systems division of Cray Research. This breakthrough was the ability to aggregate many RISC microprocessors to build a coherent, shared memory server—SMP (symmetrical multi-processor) using technology from Sun Microsystems. The magic was based upon two remarkable technologies. The first was the Solaris operating system and its multi-threading design that allowed multiple software threads to be processed in parallel. Thank you, Rob Gingle.
The second technology that made SMP work was the system interconnect which, in itself, had two remarkable dimensions. First was the fact that, in an age when most system buses were circuit-switched, this interconnect used packets. The original instantiation of this concept was a wonderful collaboration between Pradeep Sindhu from Xerox PARC and David Yen of Sun. The second dimension was the fact that this interconnect was a point-to-point design rather than a bus. This was the magic the boys from Cray brought to the table.
The result was what became the Sun E10000 server, a remarkable product that allowed up to 64 SPARC (RISC) processors to be applied to real world workloads. It arrived just in time to help many a customer convert to and scale their SAP and Oracle applications in advance of Y2K. By the way, Pradeep went on to apply his knowledge of packet switching to start Juniper Networks, where they revolutionized router design and rescued the Internet. A decade later, Dave Yen joined Pradeep at Juniper to once again rock the world, but more on that later.
The third breakthrough in which I participated was when Sun shrunk the SMP server onto a single piece of silicon. As the inexorable march of Moore's law delivered ever denser microprocessors, Sun realized it could shrink the SMP concept into a single, multi-core, multi-threaded microprocessor. We called this breakthrough technology CMT (chip multi-threading). With eight cores and four threads per core, the "Niagara" processor was the brainchild of Les Kohn. One interesting aspect is that within that processor there is a point-to-point interconnect that ties the cores together with the memory. Today the other processor vendors follow Sun's lead, and multi-core, multithreaded chips are now commonplace.
So my first experience shrunk the system into a single chip. My second experience aggregated multiple chips into a larger, more powerful system. My third experience shrunk that system onto a single chip. It only seems appropriate that my fourth breakthrough —Juniper’s QFabric technology—aggregates multiple multi-core servers into a single system, allowing all servers and storage to be interconnected into a single resource pool.
That brings me to the present. Last week we unveiled QFabric, the fruit of Juniper's Stratus Project, yet another wonderful collaboration between Pradeep Sindhu and David Yen. QFabric is a revolutionary architecture that enables the entire infrastructure within a data center to be interconnected via a fast, flat, any-to-any, packet-based fabric—not unlike SMP, but at the scale of a data center. Sun always said "the network is the computer." That is truer today than ever before. Or perhaps now, it should be “the data center is the computer.”
So continues the great circle of life. From RISC to SMP to CMT to QFabric, the process of shrinking and aggregation continues. In the early days of my career, I believed that fundamental transformations like RISC were commonplace. With a few more miles on the odometer, I now realize these are special events. This is why I joined Juniper two-and-a-half years ago—to be here when we changed the data center forever. As I did 25 years ago, I believe that 10 years from now, every data center will be built around a single, scalable fabric.
Where my crystal ball gets a little cloudy is how this will impact the world. RISC triggered a quantum change in the price/ performance of computing. This ultimately led to the ability for me to type this blog on a plane using my iPad and to have a powerful computer in my iPhone which connects via the Internet to an unimaginable wealth of information and services. I could not have imagined this 25 years ago. Today, all I know is that by interconnecting all the compute power of the data center into a single system, I believe this will unleash and assure another 25 years of innovation. Personally, I can't wait.
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