Re: Anyone success simulate MC-LAG in logical-system?
Based on the below points from the document, I don't think MC-LAG is possible with logical systems within a single chassis or VMX. You may give it a try however I expect some part of the configuration may not work.
Keep the following points in mind while configuring MC-LAG interfaces on logical systems:
You cannot use a single chassis to function as a provider edge (PE) device and a customer edge (CE) device in different logical systems.
You cannot use a single chassis to function as two PE devices by configuring logical systems on the chassis and ICCP. ICL links between the two logical systems because the multichassis aggregated Ethernet ID is unique in a router or switch.
Logical interfaces (IFLs) on the samemc-aeinterface cannot be configured across multiple logical systems. In other words, in a multichassis link aggregation (MC-LAG) with both logical systems and logical interfaces (such asmc-ae ae0 unit 0), the same logical interface cannot be shared between logical systems.